| Job Description |
Duties will include RTL
coding and modeling of SoC RF/ROM IP in System Verilog. Will own and
maintain testcases to cover RF/ROM normal functionality and the modeling
of power mode and collision conditions. Candidate will also be involved
in DFX wrapper coding and related verification work. Will need to be
able to work with RF/ROM IP customers on their verification issues.
Strong written and verbal communication skills are expected. |
| Desired Profile |
Candidates must possess Bachelors +3 years or Masters Degree + 2 years in Electrical Engineering or related discipline with 2+ years experience in RTL design or pre-silicon verification.
Minimum Requirements: - 2+ years of experience in IC Design - 2+ years of experience in RTL design or verification
Preferred Requirements: - Knowledge of memory DFT and Bist implementation - Knowledge of memory circuit design - Formal verification experience - Knowledge in low power design methodology, which includes power and clock gating, power domain isolations and UPF flow - Knowledge of System Verilog SVA (assertions) |
| Experience |
3 - 5 Years |
| Industry Type |
IT-Software / Software Services |
| Role |
Database Architect/Designer |
| Functional Area |
IT Software - Embedded, EDA, VLSI, ASIC, Chip Design |
| Education |
UG - B.Tech/B.E. - Electrical PG - M.Tech - Electrical DOCTORATE - Doctorate Not Required |
| Location |
Bengaluru/Bangalore |
| Keywords |
Design Engineer, IC Design, RTL Design, Memory Circuit Design, System Verilog, Low Power Design, RTL Coding |
| Contact |
HR
Intel Technology India Pvt Ltd
|
| Website |
http://www.intel.com |
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