| Job Description | *Development of high
speed SERDES for MIPI, D-PHY and M-PHY applications, with an extension
to other projects such as; USHII, USB 2.0 and USB 3.0 *Architecture definition, schematic generation, layout generation, blocks assembly, verification, and lab evaluation *Provide technical interface to customers, milestone and deliveries *Responsible for technical leadership and mentoring of junior design engineers *Will be required to seek and encourage new approaches and architectures for Market advantage |
Showing posts with label CMOS. Show all posts
Showing posts with label CMOS. Show all posts
Thursday, 22 August 2013
Design Engineer - Analog
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